CMOS image sensors generally comprise an array of pixels interconnected by horizontal and vertical wires, the horizontal wires generally being used for control signals for controlling the pixel rows, and the vertical wires generally being used for reading out the signals from each column of pixels.
Industrial testing of such a pixel array is generally based on what is known as an optical test, which involves capturing, using the image sensor, an image of a uniform scene, and verifying that each of the pixels provides an expected reading. Such a technique permits catastrophic defects in interconnecting wires to be detected, such defects often being referred to as HFPN (Horizontal Fixed Pattern Noise) and VFPN (Vertical Fixed Pattern Noise). If any catastrophic defect is detected in a given chip, the chip may be discarded.
A problem is that some defects may not appear as catastrophic defects at the time of manufacture, because they do not induce significant image defects under limited test conditions. However, such defects may evolve into catastrophic defects under varied field conditions, and thus may lead to clear image defects during the lifetime of the image sensor. Such defects are unacceptable in certain fields of use, such as in automotive or medical applications.
There is thus a need in the art for a circuit and method for detecting non-catastrophic faults in a pixel array of an image sensor.